This benchmark saw several updates: first the Cogent CSB637 board was retired, replaced by the Atmel Xplained board. Second, I switched to a more recent version of LTP (I was using a version from 2008, so some update was needed), which caused several platform tests to last a longer time. Third, the I-pipe patch for 3.14 integrates a change which seem to improve latencies on cortex a9, the change was reported by IMX 6q users, but works on omap4430.
- Measurement method
- on ARM
- For the Texas Instrument Panda board, running a TI OMAP4430 processor at 1 GHz:
- For the ISEE IGEP v2 board, running a TI OMAP3530 processor at 720 MHz:
- For the Atmel Xplained board, running an Atmel AT91SAMA5D3 processor at 528 MHz:
- For the Calao Systems USBA9263 board, running an Atmel AT91SAM9263 processor at 180MHz:
- on x86
- on ARM
The measurements were done with the xeno-test utility, see the Benchmarking with xeno-test page for details.
After some report from Xenomai users using the IMX 6q processors, I tried disabling the L2 cache (and only the L2 cache) writealloc policy. This seems to improve the measured worst case latency significantly on omap4, despite the fact that the test ran longer due to the new LTP version (the plot maxima are higher than those of 3.10).
We observe no regression here, the plot is above the 3.10 plot because the test ran longer because of the new LTP version, with an isolated point a bit above the others, but that is the result of running the tests a longer time, this makes paths with a low probability a bit more likely to appear, and reminds us that the results of these benchmark should always be taken with a grain of salt.
The port to this processor is very recent, these benchmarks are the first I make. I do not know yet if the values can be improved.
Latencies seem to have increase a bit to much for this board. This needs investigation.
No regression here, same comment as IGEP.