Xenomai  3.0.8
thread.h
1 /*
2  * Copyright (C) 2001-2013 Philippe Gerum <rpm@xenomai.org>.
3  * Copyright (C) 2004-2006 Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>.
4  *
5  * Xenomai is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * Xenomai is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with Xenomai; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
18  * 02111-1307, USA.
19  */
20 #ifndef _COBALT_X86_ASM_THREAD_H
21 #define _COBALT_X86_ASM_THREAD_H
22 
23 #include <asm-generic/xenomai/thread.h>
24 #include <asm/xenomai/wrappers.h>
25 #include <asm/traps.h>
26 
27 #ifndef IPIPE_X86_FPU_EAGER
28 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
29 typedef union thread_xstate x86_fpustate;
30 #define x86_fpustate_ptr(t) ((t)->fpu.state)
31 #else
32 typedef union fpregs_state x86_fpustate;
33 #define x86_fpustate_ptr(t) ((t)->fpu.active_state)
34 #endif
35 #endif
36 
37 struct xnarchtcb {
38  struct xntcb core;
39 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)
40  unsigned long sp;
41  unsigned long *spp;
42  unsigned long ip;
43  unsigned long *ipp;
44 #endif
45 #ifdef IPIPE_X86_FPU_EAGER
46  struct fpu *kfpu;
47 #else
48  x86_fpustate *fpup;
49  unsigned int root_used_math: 1;
50  x86_fpustate *kfpu_state;
51 #endif
52  unsigned int root_kfpu: 1;
53  struct {
54  unsigned long ip;
55  unsigned long ax;
56  } mayday;
57 };
58 
59 #define xnarch_fpu_ptr(tcb) ((tcb)->fpup)
60 
61 #define xnarch_fault_regs(d) ((d)->regs)
62 #define xnarch_fault_trap(d) ((d)->exception)
63 #define xnarch_fault_code(d) ((d)->regs->orig_ax)
64 #define xnarch_fault_pc(d) ((d)->regs->ip)
65 #define xnarch_fault_fpu_p(d) ((d)->exception == X86_TRAP_NM)
66 #define xnarch_fault_pf_p(d) ((d)->exception == X86_TRAP_PF)
67 #define xnarch_fault_bp_p(d) ((current->ptrace & PT_PTRACED) && \
68  ((d)->exception == X86_TRAP_DB || (d)->exception == X86_TRAP_BP))
69 #define xnarch_fault_notify(d) (!xnarch_fault_bp_p(d))
70 
71 void xnarch_switch_fpu(struct xnthread *from, struct xnthread *to);
72 
73 int xnarch_handle_fpu_fault(struct xnthread *from,
74  struct xnthread *to, struct ipipe_trap_data *d);
75 
76 void xnarch_leave_root(struct xnthread *root);
77 
78 void xnarch_init_root_tcb(struct xnthread *thread);
79 
80 void xnarch_init_shadow_tcb(struct xnthread *thread);
81 
82 void xnarch_switch_to(struct xnthread *out, struct xnthread *in);
83 
84 static inline void xnarch_enter_root(struct xnthread *root) { }
85 
86 static inline int xnarch_escalate(void)
87 {
88  if (ipipe_root_p) {
89  ipipe_raise_irq(cobalt_pipeline.escalate_virq);
90  return 1;
91  }
92 
93  return 0;
94 }
95 
96 int mach_x86_thread_init(void);
97 void mach_x86_thread_cleanup(void);
98 
99 #endif /* !_COBALT_X86_ASM_THREAD_H */