[Xenomai] Porting Xenomai on iMX6SX

Mauro Salvini mauro.salvini at smigroup.net
Wed Feb 1 10:00:28 CET 2017


Hi,
I'm trying to use an iMX6SX custom board with Xenomai.
I'm able to patch the 4.1 kernel from Freescale community (based on
4.1.15_1.2.0 branch from NXP and merged with 4.1.y branch from mainline)
with some little rejections resolved by hand.

Kernel boots but Xenomai tests point out some weird behaviors (e.g.
minimum latencies that constantly decreases by 0.001 us every 4 seconds,
clocktest that reports ~10ms deltas and warps, maximum latencies that
increases with larger sample periods, etc), so I started to read [1] to
figure out what I'm missing.

Firstly I found that iMX6SX devicetree does not list global and twd
timers. Adding these to dts solves some problems related to latencies.
Now in my dmesg I see:
[    0.000033] I-pipe, 3.000 MHz clocksource, wrap in 1431655 ms
[    0.000046] clocksource ipipe_tsc: mask: 0xffffffffffffffff
max_cycles: 0x1623fa770, max_idle_ns: 881590404476 ns
[    0.000943] I-pipe, 396.000 MHz clocksource, wrap in 10845 ms
[    0.000955] clocksource ipipe_tsc: mask: 0xffffffffffffffff
max_cycles: 0x5b5469468b, max_idle_ns: 440795218345 ns
.....
[    0.080436] Switched to clocksource ipipe_tsc

Following [1] I found that hardware timer isn't actually used on my
board, because is used only if CONFIG_SMP is selected (I disabled SMP
support because I have only one core and I noticed that SMP support
increases real-time latencies).

So, SMP support is mandatory or could be avoided and a modification to
ipipe is required?

Thanks in advance, regards
Mauro

[1]
http://xenomai.org/2014/09/porting-xenomai-dual-kernel-to-a-new-arm-soc




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