[Xenomai] [PATCH] ipipe: gicv3: [v3] Enable interrupt pipelining.

[Dmitriy Cherkasov]

On 10/12/2017 05:49 AM, Christoph Muellner wrote:
> This patch enables interrupt pipelining for ARM/ARM64 SoC with a
> GICv3 interrupt controller.
> 
> The patch was tested on a Rockchip RK3399 (ARM64 SoC) with
> Linux 4.12.14, I-pipe 4.11-arm64 and Xenomai/Cobalt 3.1 (next).
> xeno-test did not show any errors/fails and latency ran
> 72 hours in a row.
> 
> [v2]: Add I-pipe locking and the forwarding calls for locking/unlocking
> the IRQ in case of masking/unmasking.
> 
> [v3]: Using hard_cond_* instead of #ifdef'd hard_local_*.
> 
> Signed-off-by: Christoph Muellner <christoph.muellner at theobroma-systems.com>
> ---


Thanks Christoph, this is much easier to review.

>   
> +#ifdef CONFIG_IPIPE
> +static void gic_hold_irq(struct irq_data *d)
> +{
> +	struct irq_chip *chip = irq_data_get_irq_chip(d);
> +
> +	gic_poke_irq(d, GICD_ICENABLER);
> +
> +	if (chip->irq_eoi == gic_eoimode1_eoi_irq) {
> +		if (irqd_is_forwarded_to_vcpu(d))
> +			gic_poke_irq(d, GICD_ICACTIVER);
> +		gic_eoimode1_eoi_irq(d);
> +	} else
> +		gic_eoi_irq(d);
> +}
> +
> +static void gic_release_irq(struct irq_data *d)
> +{
> +	gic_poke_irq(d, GICD_ISENABLER);
> +}
> +#endif /* CONFIG_IPIPE */
> +

For these, I'm curious why not just do what you had in your first patch:

+#ifdef CONFIG_IPIPE
+static void gic_hold_irq(struct irq_data *d)
+{
+	struct irq_chip *chip = irq_data_get_irq_chip(d);
+	chip->irq_mask(d);
+	chip->irq_eoi(d);
+}
+
+static void gic_release_irq(struct irq_data *d)
+{
+	gic_unmask_irq(d);
+}
+#endif /* CONFIG_IPIPE */
+